tag:blogger.com,1999:blog-4577759886421850250.post8611955451870958624..comments2024-02-08T09:00:08.344+00:00Comments on Learn Verilog by Example: To Code a Stopwatch in VerilogUnknownnoreply@blogger.comBlogger42125tag:blogger.com,1999:blog-4577759886421850250.post-49856887667032480092020-01-01T19:30:05.574+00:002020-01-01T19:30:05.574+00:00This code isn't working. May be there is probl...This code isn't working. May be there is problem in ucf file. How to get correct ucf file of stopwatch code in verliog.zara Brandhttps://www.blogger.com/profile/17376132462783785746noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-69239672797176976472018-12-19T08:11:55.909+00:002018-12-19T08:11:55.909+00:00WARNING:Xst:2725 - "prooject.v" line 126...WARNING:Xst:2725 - "prooject.v" line 126: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 127: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 128: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 129: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 130: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 131: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 132: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 133: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 134: Size mismatch between case item and case selector.<br />WARNING:Xst:2725 - "prooject.v" line 135: Size mismatch between case item and case selector.<br /> i m facing these errors please help me its urgentHasnain Saeedhttps://www.blogger.com/profile/15849274583244440695noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-11773350274149301772018-12-01T03:40:50.637+00:002018-12-01T03:40:50.637+00:00Hello! This is very helpful. I would like to incor...Hello! This is very helpful. I would like to incorporate this into a project using a register file. Perhaps something where the times when it is stopped it loaded into a write address and then saved and can be shown? If you have any advice on this, I would appreciate it! Thank you!Anonymoushttps://www.blogger.com/profile/10610063352682815543noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-61838718556084113622018-10-16T04:14:23.179+01:002018-10-16T04:14:23.179+01:00Hey, can you please give the .ucf code for this ve...Hey, can you please give the .ucf code for this verilog code.<br />I'm using xilinx Nexys 3, Spartan 6 family.<br />Please mail it to me ASAP :)<br />guptak994@gmail.comAnonymoushttps://www.blogger.com/profile/00495405023002695123noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-63446934683095307212018-01-18T21:32:48.719+00:002018-01-18T21:32:48.719+00:00I got the error in test bench code line
#50 clo...I got the error in test bench code line <br /><br /> #50 clock = ~clock;<br /><br />Error (10119): Verilog HDL Loop Statement error at DE1_SOC_golden_top.v(313): loop with non-constant loop condition must terminate within 250 iterations<br /><br />How do i get out of this error <br />Anonymoushttps://www.blogger.com/profile/01598430850141061424noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-74650325805025688292017-12-02T22:29:35.319+00:002017-12-02T22:29:35.319+00:00Could you explain why it is case(count[N-1:N-2]) w...Could you explain why it is case(count[N-1:N-2]) won't that always make it reference 17:16? How is this right?Marcellehttps://www.blogger.com/profile/00681101260293893640noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-70361151084124392282017-11-28T23:47:29.328+00:002017-11-28T23:47:29.328+00:00Hello, do you have this code in vhdl?Hello, do you have this code in vhdl?DIEGOhttps://www.blogger.com/profile/13833643122956616397noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-10793509358089878172017-07-09T06:07:28.572+01:002017-07-09T06:07:28.572+01:00Why is local parameter N = 18?Why is local parameter N = 18?Anonymoushttps://www.blogger.com/profile/18243150938479900556noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-48091592420755977572017-05-03T00:00:24.422+01:002017-05-03T00:00:24.422+01:00^i have the same exact question^i have the same exact questionAnonymoushttps://www.blogger.com/profile/12960629947329045132noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-73270719797033015072017-04-29T16:26:59.357+01:002017-04-29T16:26:59.357+01:00have you added debouncing in it?
have you added debouncing in it?<br /> Anonymoushttps://www.blogger.com/profile/17833231422689968540noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-63945218390853998502015-11-07T13:31:31.043+00:002015-11-07T13:31:31.043+00:00Hi Mauricio, Please read my post on the seven segm...Hi Mauricio, Please read my post on the seven segment display to understand the reasoning behind that: http://simplefpga.blogspot.co.uk/2012/07/seven-segment-led-multiplexing-circuit.htmlFaraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-34734241168875031872015-11-07T01:22:55.765+00:002015-11-07T01:22:55.765+00:00helllo, why in the sentence case used (count[N-1:N...helllo, why in the sentence case used (count[N-1:N-2]) (the 2 MSB's of the counter) for generate a frecuency of Multiplexing the 1000HZ? tanksAnonymoushttps://www.blogger.com/profile/02824579915924605945noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-89373545657707672442015-08-09T20:41:17.869+01:002015-08-09T20:41:17.869+01:00How to include stop functionality in this code.How to include stop functionality in this code.srt2https://www.blogger.com/profile/04856177413070369002noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-9147747066094942922015-03-18T09:46:51.026+00:002015-03-18T09:46:51.026+00:00Is it an LCD or the seven segment led? Is it an LCD or the seven segment led? Faraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-49142836929046782802015-03-18T09:46:45.534+00:002015-03-18T09:46:45.534+00:00Is it an LCD or the seven segment led? Is it an LCD or the seven segment led? Faraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-24518839990852228432015-03-18T01:10:49.494+00:002015-03-18T01:10:49.494+00:00Hi, i am doing doing stop watch in verilog using S...Hi, i am doing doing stop watch in verilog using SPARTAN-3 FPGA_XC3S400 board. i dont no how to program lcd which displays the stop watch...pls help me.... its urgent.....karthikhttps://www.blogger.com/profile/11746479070247081718noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-20920420139138165872015-03-18T01:10:17.883+00:002015-03-18T01:10:17.883+00:00Hi, i am doing doing stop watch in verilog using S...Hi, i am doing doing stop watch in verilog using SPARTAN-3 FPGA_XC3S400 board. i dont no how to program lcd which displays the stop watch...pls help me.... its urgent.....karthikhttps://www.blogger.com/profile/11746479070247081718noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-51992889465039733202015-02-03T19:16:44.526+00:002015-02-03T19:16:44.526+00:00hey , can send the project with all codes on a rar...hey , can send the project with all codes on a rar file to this email ggadeag@gmail.com is thank you in advance .Anonymoushttps://www.blogger.com/profile/16198485592430484847noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-85284722744762041822015-01-27T18:28:42.259+00:002015-01-27T18:28:42.259+00:00I don't know the pin layout for nexys3, but yo...I don't know the pin layout for nexys3, but you should be able to find its ucf file online via a simple google search. And yes you will need a bit file in order to program your board.Faraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-15593152391223489342015-01-19T10:53:47.712+00:002015-01-19T10:53:47.712+00:00can you please upload a ucf file of nexys 3? I am ...can you please upload a ucf file of nexys 3? I am a beginner and am not aware of the creation of ucf files..also please advise if we also need to make a bitfile after the generation of ucf fileAnonymoushttps://www.blogger.com/profile/07713726221269900918noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-2671179660272985752015-01-09T22:04:44.408+00:002015-01-09T22:04:44.408+00:00To implement this on the NEXYS2 all you have to do...To implement this on the NEXYS2 all you have to do is to change your .ucf file which you have for your board to the inputs and outputs of this code.<br /><br />Have a look at the ucf file configuration of my BASYS2 board to get an idea: http://simplefpga.blogspot.co.uk/2012/06/user-constraint-file-ucf-for-basys2.htmlFaraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-51010313140230098882015-01-09T19:41:34.055+00:002015-01-09T19:41:34.055+00:00can i implement this code in nexys 2 boardcan i implement this code in nexys 2 boardAnonymoushttps://www.blogger.com/profile/07104071337337034006noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-76141030810435125122015-01-09T19:35:43.598+00:002015-01-09T19:35:43.598+00:00please help me to implement it in NEXYS 2 boardplease help me to implement it in NEXYS 2 boardAnonymoushttps://www.blogger.com/profile/07104071337337034006noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-66980639824796730342014-09-08T21:32:09.573+01:002014-09-08T21:32:09.573+01:00HOw does the test bench show 'outputs': d0...HOw does the test bench show 'outputs': d0,d1,d2 when you've not assigned them as outputs in the main program?Anonymoushttps://www.blogger.com/profile/15064718920855344746noreply@blogger.comtag:blogger.com,1999:blog-4577759886421850250.post-67481203956145462472014-04-26T22:03:38.963+01:002014-04-26T22:03:38.963+01:00Which board are you trying to implement this on?Which board are you trying to implement this on?Faraz Khanhttps://www.blogger.com/profile/10065970730757177765noreply@blogger.com